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author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-03-22 01:24:02 +0800 |
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committer | Marek Vasut <marex@denx.de> | 2019-04-17 22:20:17 +0200 |
commit | a32f7d3cd8b2a32f982b82f787baab6016200982 (patch) | |
tree | 925c796e08c0341700e94da05a226f2116ea7bd2 /configs/socfpga_stratix10_defconfig | |
parent | 6cd7134e7309a53f015a402e52e5863f29e366fd (diff) | |
download | u-boot-a32f7d3cd8b2a32f982b82f787baab6016200982.tar.gz |
configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
Stratix10 maps dram in 2 address spans, from 0-2GB and from
2GB up to 128GB.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'configs/socfpga_stratix10_defconfig')
-rw-r--r-- | configs/socfpga_stratix10_defconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 995290ca5f..4848013b21 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -6,7 +6,7 @@ CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=5 CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y |