diff options
author | Simon Glass <sjg@chromium.org> | 2016-02-22 22:55:40 -0700 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-03-14 14:21:27 -0400 |
commit | 4edb9458b2a3fde10a141967c889074fac914c77 (patch) | |
tree | e34b1307cbc297ee3c64555df89f507159504a1a /configs/socfpga_sr1500_defconfig | |
parent | f8a2d7a4162d2c8ca6adbb1fe0ef7d2a9765c923 (diff) | |
download | u-boot-4edb9458b2a3fde10a141967c889074fac914c77.tar.gz |
Correct defconfig ordering
Various boards have the wrong Kconfig ordering now. To avoid a misleading
diff in the next patch, reorder the configuration correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/socfpga_sr1500_defconfig')
-rw-r--r-- | configs/socfpga_sr1500_defconfig | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index a4f0835e9d..5181604a05 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -4,18 +4,17 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_DM=y CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_SR1500=y +CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_SPL=y -CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_ADDR=0x00800000 # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPL_SIMPLE_BUS=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_MMC=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y -CONFIG_DM_MMC=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |