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authorPavel Machek <pavel@denx.de>2016-06-07 12:37:23 +0200
committerMarek Vasut <marex@denx.de>2016-06-08 02:56:30 +0200
commit35546f6f2014282cc4f9772324b5588bd44a2938 (patch)
treeda2ba91b375aacfdd9cf6c929ef809fca48cd218 /configs/socfpga_is1_defconfig
parentb104b3dc1dd90cdbf67ccf3c51b06e4f1592fe91 (diff)
downloadu-boot-35546f6f2014282cc4f9772324b5588bd44a2938.tar.gz
ARM: socfpga: add support for IS1 board
This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'configs/socfpga_is1_defconfig')
-rw-r--r--configs/socfpga_is1_defconfig43
1 files changed, 43 insertions, 0 deletions
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
new file mode 100644
index 0000000000..7d43c7245e
--- /dev/null
+++ b/configs/socfpga_is1_defconfig
@@ -0,0 +1,43 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_TARGET_SOCFPGA_IS1=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_MMC is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_SYS_NS16550=y
+CONFIG_CADENCE_QSPI=y