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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-09-28 05:14:15 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-09-28 09:06:13 -0400 |
| commit | 80df6913499a93bfa9529b6f0f8113bfe3b0d734 (patch) | |
| tree | 2f1db7a56e40e3bfb125014856d3edf39a995fca /configs/socfpga_cyclone5_defconfig | |
| parent | 1a9c229bf754c89f42b085451ad506693f326427 (diff) | |
| download | u-boot-80df6913499a93bfa9529b6f0f8113bfe3b0d734.tar.gz | |
Reorder defconfigs with 'savedefconfig'
Some boards' defconfigs are disordered. Reorder them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'configs/socfpga_cyclone5_defconfig')
| -rw-r--r-- | configs/socfpga_cyclone5_defconfig | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 8a7f8ccb95..fcd12d91e5 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_DM=y +CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL=y @@ -8,11 +10,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x00800000 # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_SPL_DM=y +CONFIG_DWAPB_GPIO=y CONFIG_SPI_FLASH=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y -CONFIG_DM_GPIO=y -CONFIG_DWAPB_GPIO=y |