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authorBin Meng <bmeng.cn@gmail.com>2015-11-13 00:11:23 -0800
committerSimon Glass <sjg@chromium.org>2015-12-01 06:26:35 -0700
commit1d4c83c2480b0874214165571e8a056a8b423db2 (patch)
treeb0c01d25b6c7698384ec84a2be6acb9779d391f0 /configs/coreboot-x86_defconfig
parent80af39842e64a44258ab5eb913659e29fc319903 (diff)
downloadu-boot-1d4c83c2480b0874214165571e8a056a8b423db2.tar.gz
x86: tsc: Remove legacy timer codes
Now that we have converted all x86 boards to use driver model timer, remove these legacy timer codes in the tsc driver. Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option, as it is not needed with driver model. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/coreboot-x86_defconfig')
-rw-r--r--configs/coreboot-x86_defconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 05b1325c06..cd2be18ac4 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -1,7 +1,6 @@
CONFIG_X86=y
CONFIG_VENDOR_COREBOOT=y
CONFIG_TARGET_COREBOOT=y
-CONFIG_TSC_CALIBRATION_BYPASS=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set