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| author | Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> | 2018-01-12 12:33:50 -0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-05-31 13:50:39 +0200 |
| commit | c66f5620e6a63b1912c017781c7eec6400dde292 (patch) | |
| tree | c4518dca9dbc111466d436bddaca765b9f812651 /configs/bitmain_antminer_s9_defconfig | |
| parent | 5dd84a3fbd18bb16520d8ce35183b7fa2fe10d37 (diff) | |
| download | u-boot-c66f5620e6a63b1912c017781c7eec6400dde292.tar.gz | |
arm: zynq: Add support for Bitmain Antminer S9 control board
This is control board on Bitmain Antminer S9.
There are 3 board variables with 256MB, 512MB and 1024MB DDR.
DDR memory is automatically detected with using get_with using
get_ram_size().
Bitmain is using 16MB space for FPGA which is handled via
reserved-memory. Also U-Boot is allocating 16B for storing bootcounts.
Watchdog is started but never service in U-Boot.
SPL MMC is working. SPL NAND is not working because it is not supported
as of now.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs/bitmain_antminer_s9_defconfig')
| -rw-r--r-- | configs/bitmain_antminer_s9_defconfig | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig new file mode 100644 index 0000000000..fc52da05bc --- /dev/null +++ b/configs/bitmain_antminer_s9_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_SYS_VENDOR="bitmain" +CONFIG_SYS_BOARD="antminer_s9" +CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SPL=y +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=3 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="antminer> " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_CMD_PART=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_NFS is not set +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_PXE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_NAND=y +CONFIG_NAND_ZYNQ=y +CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +# CONFIG_WATCHDOG is not set +CONFIG_WDT=y +CONFIG_WDT_CDNS=y +# CONFIG_EFI_LOADER is not set |