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| author | Simon Glass <sjg@chromium.org> | 2016-09-12 23:18:22 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-09-16 17:03:36 -0400 |
| commit | c2ae7d822086fd07386c3a67f76350e749418f66 (patch) | |
| tree | 367346c45b58a8af3fa884967118a6e865197e47 /configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | |
| parent | 9ede21234172ac9dff078e3e5f6dbd4a407c4680 (diff) | |
| download | u-boot-c2ae7d822086fd07386c3a67f76350e749418f66.tar.gz | |
Kconfig: Move SPL settings into their own file
Move the SPL settings into common/spl where most of the SPL code is kept.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig')
| -rw-r--r-- | configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index f4e3c6ec86..db594aa7a7 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_PHYS_64BIT=y -CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y |