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authorSimon Glass <sjg@chromium.org>2020-07-17 08:48:29 -0600
committerBin Meng <bmeng.cn@gmail.com>2020-07-20 09:46:48 +0800
commitf91f5ab6f0fe2c33b2dd9aa078a87c09eb792a4c (patch)
tree9323ff737b537d14a58b65070bba4af94cb8fa78 /cmd
parentb2a76b3fe75a24eb4dafe32eebd8a3c98ad18354 (diff)
downloadu-boot-f91f5ab6f0fe2c33b2dd9aa078a87c09eb792a4c.tar.gz
x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU
Add a -c option to mtrr to allow any CPU to be updated with this command. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'cmd')
-rw-r--r--cmd/x86/mtrr.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index b51b1cd7e2..d8a7e56d5a 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -104,6 +104,17 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
int ret;
cpu_select = MP_SELECT_BSP;
+ if (argc >= 3 && !strcmp("-c", argv[1])) {
+ const char *cpustr;
+
+ cpustr = argv[2];
+ if (*cpustr == 'a')
+ cpu_select = MP_SELECT_ALL;
+ else
+ cpu_select = simple_strtol(cpustr, NULL, 16);
+ argc -= 2;
+ argv += 2;
+ }
argc--;
argv++;
cmd = argv[0] ? *argv[0] : 0;
@@ -145,11 +156,14 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
}
U_BOOT_CMD(
- mtrr, 6, 1, do_mtrr,
+ mtrr, 8, 1, do_mtrr,
"Use x86 memory type range registers (32-bit only)",
"[list] - list current registers\n"
"set <reg> <type> <start> <size> - set a register\n"
"\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
"disable <reg> - disable a register\n"
- "enable <reg> - enable a register"
+ "enable <reg> - enable a register\n"
+ "\n"
+ "Precede command with '-c <n>|all' to access a particular hex CPU, e.g.\n"
+ " mtrr -c all list; mtrr -c 2e list"
);