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| author | Max Krummenacher <max.oss.09@gmail.com> | 2016-11-30 19:43:08 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-12-16 10:02:45 +0100 |
| commit | 592f4aed6db765172e21f228800b49f9a27ff201 (patch) | |
| tree | 2c535db114a86f9ca5cbeb75761b40d86c8c6fc9 /board/toradex/apalis_imx6/clocks.cfg | |
| parent | 19271138fff79419b0c25e3570ed58046dba1780 (diff) | |
| download | u-boot-592f4aed6db765172e21f228800b49f9a27ff201.tar.gz | |
arm: imx: initial support for apalis imx6
This adds board support for the Toradex module family Apalis iMX6.
The familiy consists of a module with i.MX6 Dual, i.MX6 Quad with
commercial and industrial temperature range.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to 'board/toradex/apalis_imx6/clocks.cfg')
| -rw-r--r-- | board/toradex/apalis_imx6/clocks.cfg | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/board/toradex/apalis_imx6/clocks.cfg b/board/toradex/apalis_imx6/clocks.cfg new file mode 100644 index 0000000000..be96094fa0 --- /dev/null +++ b/board/toradex/apalis_imx6/clocks.cfg @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2014-2016, Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb |