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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2017-11-27 05:37:53 +0100 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2017-11-30 02:34:20 +0100 |
| commit | aee24b594a0fd9814b7819b565a35c84b4710b70 (patch) | |
| tree | df991aa887f6eb769bfb1ca7bef69c49261732f0 /board/renesas/ulcb | |
| parent | 1bb8ea3beb2b51be25cad85c7f49d0220bf4e9cd (diff) | |
| download | u-boot-aee24b594a0fd9814b7819b565a35c84b4710b70.tar.gz | |
ARM: rmobile: Configure DRAM sizes from DT
Drop the ad-hoc DRAM configuration with macros and just decode
the DRAM configuration from device tree instead. This makes it
far cleaner and easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/renesas/ulcb')
| -rw-r--r-- | board/renesas/ulcb/ulcb.c | 28 |
1 files changed, 4 insertions, 24 deletions
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 000dd51ab7..ed891c833c 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -97,35 +97,15 @@ int board_init(void) int dram_init(void) { - gd->ram_size = PHYS_SDRAM_1_SIZE; -#if (CONFIG_NR_DRAM_BANKS >= 2) - gd->ram_size += PHYS_SDRAM_2_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 3) - gd->ram_size += PHYS_SDRAM_3_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 4) - gd->ram_size += PHYS_SDRAM_4_SIZE; -#endif + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; return 0; } int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#if (CONFIG_NR_DRAM_BANKS >= 2) - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 3) - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; - gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 4) - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; - gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; -#endif + fdtdec_setup_memory_banksize(); + return 0; } |