diff options
author | Simon Glass <sjg@chromium.org> | 2015-08-30 19:19:24 -0600 |
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committer | Tom Rini <trini@konsulko.com> | 2015-09-11 14:58:48 -0400 |
commit | 49d8899ba9c26335e4a12e01c18028fc5e40c796 (patch) | |
tree | 567e4d77c4fbeb6f1c0d5b497ed1e57f06fd3661 /board/pxa255_idp/idp_notes.txt | |
parent | 79d19734a9e2dbd3fc414512227a24f60cd3572a (diff) | |
download | u-boot-49d8899ba9c26335e4a12e01c18028fc5e40c796.tar.gz |
arm: Remove pxa255_idp, zipitz2 boards
These boards have not been converted to generic board by the deadline.
Remove them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/pxa255_idp/idp_notes.txt')
-rw-r--r-- | board/pxa255_idp/idp_notes.txt | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/board/pxa255_idp/idp_notes.txt b/board/pxa255_idp/idp_notes.txt deleted file mode 100644 index 47467485fe..0000000000 --- a/board/pxa255_idp/idp_notes.txt +++ /dev/null @@ -1,46 +0,0 @@ -Notes on the Vibren PXA255 IDP. - -Chip select usage: - -CS0 - flash -CS1 - alt flash (Mdoc or main flash) -CS2 - high speed expansion bus -CS3 - Media Q, low speed exp bus -CS4 - low speed exp bus -CS5 - low speed exp bus - - IDE: offset 0x03000000 (abs: 0x17000000) - - Eth: offset 0x03400000 (abs: 0x17400000) - - core voltage latch: offset 0x03800000 (abs: 0x17800000) - - CPLD: offset 0x03C00000 (abs: 0x17C00000) - -PCMCIA Power control - -MAX1602EE w/ code pulled high (Cirrus code) -vx = 5v -vy = 3v - - Bit pattern - PWR 3,2,1,0 -vcc vpp A1VCC A0VCC A1VPP A0VPP -===================================================== -0 0 0 0 0 0 0x0 -3 (vy) 0 1 0 1 1 0xB -3 (vy) 3 (vy) 1 0 0 1 0x9 -3 (vy) 12(12in) 1 0 1 0 0xA -5 (vx) 0 0 1 1 1 0x7 -5 (vx) 5 (vx) 0 1 0 1 0x5 -5 (vx 12(12in) 0 1 1 0 0x6 - -Display power sequencing: - -- VDD applied -- within 1sec, activate scanning signals -- wait at least 50mS - scanning signals must be active before activating DISP - -Signal mapping: -Schematic LV8V31 signal name -========================================= -LCD_ENAVLCD DISP -LCD_PWR Applies VDD to board - -Both of the above signals are controlled by the CPLD |