diff options
author | Rob Herring <rob.herring@calxeda.com> | 2013-06-12 22:24:52 -0500 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-07-25 08:16:07 +0200 |
commit | 76c3999db439491a406cd6e7778300c992cda785 (patch) | |
tree | 48aa116b5483e707788926897e3107a86bfa468a /board/highbank | |
parent | e1df283c26f14776419bff675b7887cf04bc1c20 (diff) | |
download | u-boot-76c3999db439491a406cd6e7778300c992cda785.tar.gz |
ARM: highbank: setup peripherals based on power domain status
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'board/highbank')
-rw-r--r-- | board/highbank/highbank.c | 31 |
1 files changed, 29 insertions, 2 deletions
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c index 09cd45d374..b224aae41b 100644 --- a/board/highbank/highbank.c +++ b/board/highbank/highbank.c @@ -23,13 +23,21 @@ #include <asm/sizes.h> #include <asm/io.h> +#define HB_AHCI_BASE 0xffe08000 + #define HB_SREG_A9_PWR_REQ 0xfff3cf00 #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 +#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 + #define HB_PWR_SUSPEND 0 #define HB_PWR_SOFT_RESET 1 #define HB_PWR_HARD_RESET 2 #define HB_PWR_SHUTDOWN 3 +#define PWRDOM_STAT_SATA 0x80000000 +#define PWRDOM_STAT_PCI 0x40000000 +#define PWRDOM_STAT_EMMC 0x20000000 + DECLARE_GLOBAL_DATA_PTR; /* @@ -58,9 +66,12 @@ int misc_init_r(void) { char envbuffer[16]; u32 boot_choice; + u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); - ahci_init(0xffe08000); - scsi_scan(1); + if (reg & PWRDOM_STAT_SATA) { + ahci_init(HB_AHCI_BASE); + scsi_scan(1); + } boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; sprintf(envbuffer, "bootcmd%d", boot_choice); @@ -85,6 +96,22 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; } +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *fdt, bd_t *bd) +{ + static const char disabled[] = "disabled"; + u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); + + if (!(reg & PWRDOM_STAT_SATA)) + do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status", + disabled, sizeof(disabled), 1); + + if (!(reg & PWRDOM_STAT_EMMC)) + do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status", + disabled, sizeof(disabled), 1); +} +#endif + void reset_cpu(ulong addr) { writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); |