diff options
| author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:10 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:11 +0100 |
| commit | 70a09c6c3dc25b200a9d0475afcf5dfc9836b18e (patch) | |
| tree | 8b4433ebbbbd7e558b4a291cb2ccd2aec14ab710 /board/google | |
| parent | d1cd045982b1e1e4db2c1cc2b2b932f739b78a11 (diff) | |
| download | u-boot-70a09c6c3dc25b200a9d0475afcf5dfc9836b18e.tar.gz | |
x86: chromebook_link: Implement CAR support (cache as RAM)
Add support for CAR so that we have memory to use prior to DRAM init.
On link there is a total of 128KB of CAR available, although some is
used for the memory reference code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/google')
| -rw-r--r-- | board/google/chromebook_link/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 9c715ba765..3a4f557d30 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -12,6 +12,18 @@ config SYS_SOC config SYS_CONFIG_NAME default "chromebook_link" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_IVYBRIDGE + select SOUTHBRIDGE_INTEL_C216 + select HAVE_ACPI_RESUME + select MARK_GRAPHICS_MEM_WRCOMB + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + config EARLY_POST_CROS_EC bool "Enable early post to Chrome OS EC" default y |