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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-12-11 02:55:49 -0800 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-13 12:20:15 +0800 |
| commit | fa331fad1eee0bd86470b49a905ed176aa412b9a (patch) | |
| tree | 1fa5ce2a3743f59983688aa2b0c314df4fc21cb7 /board/google | |
| parent | 33fb6c0100de6dbc79d0237418941cc40e94b16d (diff) | |
| download | u-boot-fa331fad1eee0bd86470b49a905ed176aa412b9a.tar.gz | |
x86: ivybridge: Do not require HAVE_INTEL_ME
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/google')
| -rw-r--r-- | board/google/chromebook_link/Kconfig | 1 | ||||
| -rw-r--r-- | board/google/chromebox_panther/Kconfig | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 6b139392b5..fa12f338de 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR select NORTHBRIDGE_INTEL_IVYBRIDGE + select HAVE_INTEL_ME select BOARD_ROMSIZE_KB_8192 config PCIE_ECAM_BASE diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig index ae96d23d03..2af3aa9e74 100644 --- a/board/google/chromebox_panther/Kconfig +++ b/board/google/chromebox_panther/Kconfig @@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR select NORTHBRIDGE_INTEL_IVYBRIDGE + select HAVE_INTEL_ME select BOARD_ROMSIZE_KB_8192 config SYS_CAR_ADDR |