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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2015-08-21 15:19:36 +0800
committerYork Sun <yorksun@freescale.com>2015-09-01 20:58:58 -0500
commit47deb4b4a9cbaf5896cc823d20ad9f6389f3d865 (patch)
tree168aab51a8619526f9758625b575c187234c25f8 /board/freescale/t102xrdb
parent9ae14ca2e78ea99cfec673103387ab6e00f7f586 (diff)
downloadu-boot-47deb4b4a9cbaf5896cc823d20ad9f6389f3d865.tar.gz
powerpc/t1023rdb: change default core frequency to 1200MHz
Per new requirement, change default core frequency from previous 1400MHz to 1200MHz to save power. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t102xrdb')
-rw-r--r--board/freescale/t102xrdb/t1023_rcw.cfg4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/t102xrdb/t1023_rcw.cfg b/board/freescale/t102xrdb/t1023_rcw.cfg
index 1d11a2eed7..f8f72826b1 100644
--- a/board/freescale/t102xrdb/t1023_rcw.cfg
+++ b/board/freescale/t102xrdb/t1023_rcw.cfg
@@ -1,8 +1,8 @@
#PBL preamble and RCW header for T1023RDB
aa55aa55 010e0100
#SerDes Protocol: 0x77
-#Core/DDR: 1400Mhz/1600MT/s with single source clock
-0810000e 00000000 00000000 00000000
+#Default Core=1200MHz, DDR=1600MT/s with single source clock
+0810000c 00000000 00000000 00000000
3b800003 00000012 e8104000 21000000
00000000 00000000 00000000 00022800
00000130 04020200 00000000 00000006