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author | Tom Rini <trini@konsulko.com> | 2020-05-20 08:46:56 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2020-05-20 08:46:56 -0400 |
commit | b0b13f4114d30b6756e0f6f3b5819d78de22541e (patch) | |
tree | 5e3afc6650d3b9f6040e1d51972120eb3ee2f35e /board/freescale/ls1088a/eth_ls1088aqds.c | |
parent | 023329284dadbbe7e0ed40bcda8101653997e507 (diff) | |
parent | 13bc860727ee406f073c8176dd2d6b9dacf35443 (diff) | |
download | u-boot-b0b13f4114d30b6756e0f6f3b5819d78de22541e.tar.gz |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqWIP/20May2020
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
Diffstat (limited to 'board/freescale/ls1088a/eth_ls1088aqds.c')
-rw-r--r-- | board/freescale/ls1088a/eth_ls1088aqds.c | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index 8371c1c9c2..e5d9d946cb 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -26,6 +26,7 @@ #include "ls1088a_qixis.h" +#ifndef CONFIG_DM_ETH #ifdef CONFIG_FSL_MC_ENET #define SFP_TX 0 @@ -737,6 +738,7 @@ int board_eth_init(bd_t *bis) error = pci_eth_init(bis); return error; } +#endif // !CONFIG_DM_ETH #if defined(CONFIG_RESET_PHY_R) void reset_phy(void) @@ -744,3 +746,90 @@ void reset_phy(void) mc_env_boot(); } #endif /* CONFIG_RESET_PHY_R */ + +#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT) + +/* Structure to hold SERDES protocols supported in case of + * CONFIG_DM_ETH enabled (network interfaces are described in the DTS). + * + * @serdes_block: the index of the SERDES block + * @serdes_protocol: the decimal value of the protocol supported + * @dts_needed: DTS notes describing the current configuration are needed + * + * When dts_needed is true, the board_fit_config_name_match() function + * will try to exactly match the current configuration of the block with a DTS + * name provided. + */ +static struct serdes_configuration { + u8 serdes_block; + u32 serdes_protocol; + bool dts_needed; +} supported_protocols[] = { + /* Serdes block #1 */ + {1, 21, true}, + {1, 29, true}, +}; + +#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols) + +static bool protocol_supported(u8 serdes_block, u32 protocol) +{ + struct serdes_configuration serdes_conf; + int i; + + for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) { + serdes_conf = supported_protocols[i]; + if (serdes_conf.serdes_block == serdes_block && + serdes_conf.serdes_protocol == protocol) + return true; + } + + return false; +} + +static void get_str_protocol(u8 serdes_block, u32 protocol, char *str) +{ + struct serdes_configuration serdes_conf; + int i; + + for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) { + serdes_conf = supported_protocols[i]; + if (serdes_conf.serdes_block == serdes_block && + serdes_conf.serdes_protocol == protocol) { + if (serdes_conf.dts_needed == true) + sprintf(str, "%u", protocol); + else + sprintf(str, "x"); + return; + } + } +} + +int board_fit_config_name_match(const char *name) +{ + struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + char expected_dts[100]; + char srds_s1_str[2]; + u32 srds_s1, cfg; + + cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & + FSL_CHASSIS3_SRDS1_PRTCL_MASK; + cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT; + srds_s1 = serdes_get_number(FSL_SRDS_1, cfg); + + /* Check for supported protocols. The default DTS will be used + * in this case + */ + if (!protocol_supported(1, srds_s1)) + return -1; + + get_str_protocol(1, srds_s1, srds_s1_str); + + sprintf(expected_dts, "fsl-ls1088a-qds-%s-x", srds_s1_str); + + if (!strcmp(name, expected_dts)) + return 0; + + return -1; +} +#endif |