diff options
author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-12-09 16:08:59 +0800 |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2017-01-18 09:29:02 -0800 |
commit | 6424577b1bf1c7872baea42de174bc461de74b6b (patch) | |
tree | d93f78fdf432486de742f14a0c83dd20061df621 /board/freescale/ls1046ardb/cpld.c | |
parent | 4394ad1227e5752b13fefa99846cb7073f4dd42b (diff) | |
download | u-boot-6424577b1bf1c7872baea42de174bc461de74b6b.tar.gz |
ls1046ardb: cpld: add API for selecting core volt
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1046ardb/cpld.c')
-rw-r--r-- | board/freescale/ls1046ardb/cpld.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/board/freescale/ls1046ardb/cpld.c b/board/freescale/ls1046ardb/cpld.c index 81a646e28c..c0500f474f 100644 --- a/board/freescale/ls1046ardb/cpld.c +++ b/board/freescale/ls1046ardb/cpld.c @@ -82,6 +82,15 @@ void cpld_set_sd(void) CPLD_WRITE(system_rst, 1); } + +void cpld_select_core_volt(bool en_0v9) +{ + u8 reg17 = en_0v9; + + CPLD_WRITE(vdd_en, 1); + CPLD_WRITE(vdd_sel, reg17); +} + #ifdef DEBUG static void cpld_dump_regs(void) { |