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authorAneesh Bansal <aneesh.bansal@freescale.com>2015-12-08 13:54:29 +0530
committerYork Sun <yorksun@freescale.com>2015-12-15 08:57:35 +0800
commit9711f52806655bcfa28fe5594b91fed430beb72e (patch)
tree9e4f8aa76fd55c89cfd31c84c4ad9bc588b2d691 /board/freescale/ls1043ardb
parente8f954a756a825130d11b9c8fca70101dd8b3ac5 (diff)
downloadu-boot-9711f52806655bcfa28fe5594b91fed430beb72e.tar.gz
armv8/ls1043ardb: add SECURE BOOT target for NOR
LS1043ARDB Secure Boot Target from NOR has been added. - Configs defined to enable esbc_validate. - ESBC Address in header is made 64 bit. - SMMU is re-configured in Bypass mode. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/ls1043ardb')
-rw-r--r--board/freescale/ls1043ardb/MAINTAINERS5
-rw-r--r--board/freescale/ls1043ardb/ls1043ardb.c18
2 files changed, 22 insertions, 1 deletions
diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS
index efca5bf245..84ffb638d8 100644
--- a/board/freescale/ls1043ardb/MAINTAINERS
+++ b/board/freescale/ls1043ardb/MAINTAINERS
@@ -7,3 +7,8 @@ F: include/configs/ls1043ardb.h
F: configs/ls1043ardb_defconfig
F: configs/ls1043ardb_nand_defconfig
F: configs/ls1043ardb_sdcard_defconfig
+
+LS1043A_SECURE_BOOT BOARD
+M: Aneesh Bansal <aneesh.bansal@freescale.com>
+S: Maintained
+F: configs/ls1043ardb_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 4556ea8ad1..c8f723a108 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -18,6 +18,8 @@
#include <fsl_csu.h>
#include <fsl_esdhc.h>
#include <fsl_ifc.h>
+#include <environment.h>
+#include <fsl_sec.h>
#include "cpld.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -123,7 +125,21 @@ int config_board_mux(void)
int misc_init_r(void)
{
config_board_mux();
-
+#ifdef CONFIG_SECURE_BOOT
+ /* In case of Secure Boot, the IBR configures the SMMU
+ * to allow only Secure transactions.
+ * SMMU must be reset in bypass mode.
+ * Set the ClientPD bit and Clear the USFCFG Bit
+ */
+ u32 val;
+ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_SCR0, val);
+ val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_NSCR0, val);
+#endif
+#ifdef CONFIG_FSL_CAAM
+ return sec_init();
+#endif
return 0;
}
#endif