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authorMarian Balakowicz <m8@semihalf.com>2005-10-28 22:30:33 +0200
committerMarian Balakowicz <m8@semihalf.com>2005-10-28 22:30:33 +0200
commit63ff004c4fcad9f690bf44dbd15d568bb47aac2d (patch)
tree7b64074a85da8118b6c862f14de1171b36ade0f7 /board/csb472
parentfe93483a0ab9dcbf7794ffbf0b029ba138380e81 (diff)
downloadu-boot-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.tar.gz
Add support for multiple PHYs.
Diffstat (limited to 'board/csb472')
-rw-r--r--board/csb472/csb472.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c
index 83418dac8c..833bbce923 100644
--- a/board/csb472/csb472.c
+++ b/board/csb472/csb472.c
@@ -132,10 +132,14 @@ long initdram (int board_type)
int last_stage_init(void)
{
/* initialize the PHY */
- miiphy_reset(CONFIG_PHY_ADDR);
- miiphy_write(CONFIG_PHY_ADDR, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); /* AUTO neg */
- miiphy_write(CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); /* LEDs */
+ miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR);
+
+ /* AUTO neg */
+ miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR,
+ PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+
+ /* LEDs */
+ miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);
return 0; /* success */
}