diff options
author | Heiko Schocher <hs@denx.de> | 2015-05-18 13:32:31 +0200 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2015-05-26 14:18:11 +0200 |
commit | 7254d92ebcedf9dc8dfe76a8d310faf46f46274f (patch) | |
tree | e84786aa5762494da6a6524ae92dd9f35d17d394 /board/aristainetos/clocks2.cfg | |
parent | e6c8b716c7035fd2b80d0b938e736176053b9ef6 (diff) | |
download | u-boot-7254d92ebcedf9dc8dfe76a8d310faf46f46274f.tar.gz |
arm, imx6: add support for aristainetos2 board
add support for imx6dl based aristainetos2 board
U-Boot 2015.04-rc5-00066-g60f6ed4 (Apr 10 2015 - 08:46:27)
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
Reset cause: WDOG
Board: aristaitenos2
Watchdog enabled
I2C: ready
DRAM: 1 GiB
NAND: 1024 MiB
MMC: FSL_SDHC: 0
SF: Detected N25Q128A with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Display: lg4573 (480x800)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
=>
Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'board/aristainetos/clocks2.cfg')
-rw-r--r-- | board/aristainetos/clocks2.cfg | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/board/aristainetos/clocks2.cfg b/board/aristainetos/clocks2.cfg new file mode 100644 index 0000000000..987d9a47b0 --- /dev/null +++ b/board/aristainetos/clocks2.cfg @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00c03f3f +DATA 4, CCM_CCGR1, 0x0030fcff +DATA 4, CCM_CCGR2, 0x0fffcfc0 +DATA 4, CCM_CCGR3, 0x3ff0300f +DATA 4, CCM_CCGR4, 0xfffff300 +DATA 4, CCM_CCGR5, 0x0f0000c3 +DATA 4, CCM_CCGR6, 0x00000fff |