x86: Add Advantech SOM-DB5800/SOM-6867 support

Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.

Currently supported:
 - 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on
   SOM-DB5800.
 - 4x USB 2.0 (EHCI)
 - Video
 - SATA
 - Ethernet
 - PCIe
 - Realtek ALC892 HD Audio
   Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO
   HDA_SDI0 is set in DT to enable HD Audio codec.
   Pin defaults for codec pin complexs are not changed.

Not supported:
 - Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500)
 - USB 3.0 (XHCI)
 - TPM

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

9 files changed, 132 insertions, 0 deletions

diff --git a/board/advantech/Kconfig b/board/advantech/Kconfig
new file mode 100644
index 0000000000..a8d49691f7
--- /dev/null
+++ b/board/advantech/Kconfig
@@ -0,0 +1,28 @@
+if VENDOR_ADVANTECH
+
+choice
+	prompt "Mainboard model"
+	optional
+
+config TARGET_SOM_DB5800_SOM_6867
+	bool "Advantech SOM-DB5800 & SOM-6867"
+	help
+	  Advantech SOM-DB5800 COM Express development board with SOM-6867
+	  installed.
+
+	  SOM-6867 is a COM Express Type 6 Compact Module with either an Intel
+	  Atom E3845 or Celeron N2920 processor.
+
+	  SOM-DB5800 is a COM Express Development board with:
+	    10/100/1000 Ethernet
+	    PCIe slots
+	    4x USB ports
+	    HDMI/DisplayPort/DVI, LVDS, VGA
+	    SATA ports
+	    ALC892 HD Audio Codec
+
+endchoice
+
+source "board/advantech/som-db5800-som-6867/Kconfig"
+
+endif
diff --git a/board/advantech/som-db5800-som-6867/.gitignore b/board/advantech/som-db5800-som-6867/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/advantech/som-db5800-som-6867/Kconfig b/board/advantech/som-db5800-som-6867/Kconfig
new file mode 100644
index 0000000000..f6f3748fc3
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/Kconfig
@@ -0,0 +1,28 @@
+if TARGET_SOM_DB5800_SOM_6867
+
+config SYS_BOARD
+	default "som-db5800-som-6867"
+
+config SYS_VENDOR
+	default "advantech"
+
+config SYS_SOC
+	default "baytrail"
+
+config SYS_CONFIG_NAME
+	default "som-db5800-som-6867"
+
+config SYS_TEXT_BASE
+	default 0xfff00000 if !EFI_STUB
+	default 0x01110000 if EFI_STUB
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select X86_RESET_VECTOR if !EFI_STUB
+	select INTEL_BAYTRAIL
+	select BOARD_ROMSIZE_KB_8192
+
+config PCIE_ECAM_BASE
+	default 0xe0000000
+
+endif
diff --git a/board/advantech/som-db5800-som-6867/MAINTAINERS b/board/advantech/som-db5800-som-6867/MAINTAINERS
new file mode 100644
index 0000000000..92989bfba0
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/MAINTAINERS
@@ -0,0 +1,7 @@
+Advantech SOM-DB5800-SOM-6867
+M:	George McCollister <george.mccollister@gmail.com>
+S:	Maintained
+F:	board/advantech/som-db5800-som-6867
+F:	include/configs/som-db5800-som-6867.h
+F:	configs/som-db5800-som-6867_defconfig
+F:	arch/x86/dts/baytrail_som-db5800-som-6867.dts
diff --git a/board/advantech/som-db5800-som-6867/Makefile b/board/advantech/som-db5800-som-6867/Makefile
new file mode 100644
index 0000000000..9837aa0c79
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2015, Google, Inc
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= som-db5800-som-6867.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/advantech/som-db5800-som-6867/acpi/mainboard.asl b/board/advantech/som-db5800-som-6867/acpi/mainboard.asl
new file mode 100644
index 0000000000..21785ea73b
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+	Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/advantech/som-db5800-som-6867/dsdt.asl b/board/advantech/som-db5800-som-6867/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+	/* platform specific */
+	#include <asm/arch/acpi/platform.asl>
+
+	/* board specific */
+	#include "acpi/mainboard.asl"
+}
diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
new file mode 100644
index 0000000000..5bed2c1146
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ * Copyright (C) 2016 George McCollister <george.mccollister@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+int board_early_init_f(void)
+{
+	/*
+	 * The FSP enables the BayTrail internal legacy UART (again).
+	 * Disable it again, so that the one on the EC can be used.
+	 */
+	setup_internal_uart(0);
+
+	return 0;
+}
+
+int arch_early_init_r(void)
+{
+	return 0;
+}
diff --git a/board/advantech/som-db5800-som-6867/start.S b/board/advantech/som-db5800-som-6867/start.S
new file mode 100644
index 0000000000..2c941a4a51
--- /dev/null
+++ b/board/advantech/som-db5800-som-6867/start.S
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2015, Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+	jmp	early_board_init_ret