diff options
| author | Tero Kristo <t-kristo@ti.com> | 2019-09-27 19:14:28 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-10-11 13:32:39 -0400 |
| commit | 9850d4e52f7f8da1bab7fae32f90e8eba7b4f6af (patch) | |
| tree | eda030a2d6c8602a85030b59d91d9a8ad803aaa0 /arch | |
| parent | e8e683d33b0ccd43e03809bf4ea88a899a867473 (diff) | |
| download | u-boot-9850d4e52f7f8da1bab7fae32f90e8eba7b4f6af.tar.gz | |
board: ti: am43xx-idk: Configure the CDCE913 clock synthesizer
AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/am437x-idk-evm-u-boot.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi index 3aa9195e44..50fe09cfc3 100644 --- a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi @@ -9,6 +9,12 @@ ocp { u-boot,dm-spl; }; + + xtal25mhz: xtal25mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; }; &uart0 { @@ -17,6 +23,14 @@ &i2c0 { u-boot,dm-spl; + + cdce913: cdce913@65 { + compatible = "ti,cdce913"; + reg = <0x65>; + clocks = <&xtal25mhz>; + #clock-cells = <1>; + xtal-load-pf = <0>; + }; }; &mmc1 { |