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authorMichal Simek <michal.simek@xilinx.com>2019-05-21 12:07:23 +0200
committerMichal Simek <michal.simek@xilinx.com>2019-07-30 10:20:06 +0200
commit420d44678119a5df1fcc154d1c33d35fd9722285 (patch)
tree233c602af1e65ed1abf07ff5fb423ea6f07415da /arch
parentce7b93d4fc6b992ce0215e7b22f3983d20482b60 (diff)
downloadu-boot-420d44678119a5df1fcc154d1c33d35fd9722285.tar.gz
arm64: zynqmp: Rename zc1275 to zcu1275
Name of this platform has changed and released to customers that's why name has also changed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: uboot
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/Makefile4
-rw-r--r--arch/arm/dts/zynqmp-zcu1275-revA.dts (renamed from arch/arm/dts/zynqmp-zc1275-revA.dts)7
-rw-r--r--arch/arm/dts/zynqmp-zcu1275-revB.dts (renamed from arch/arm/dts/zynqmp-zc1275-revB.dts)7
3 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b437f7500c..ff181978de 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -253,10 +253,10 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-zcu104-revC.dtb \
zynqmp-zcu106-revA.dtb \
zynqmp-zcu111-revA.dtb \
+ zynqmp-zcu1275-revA.dtb \
+ zynqmp-zcu1275-revB.dtb \
zynqmp-zc1232-revA.dtb \
zynqmp-zc1254-revA.dtb \
- zynqmp-zc1275-revA.dtb \
- zynqmp-zc1275-revB.dtb \
zynqmp-zc1751-xm015-dc1.dtb \
zynqmp-zc1751-xm016-dc2.dtb \
zynqmp-zc1751-xm017-dc3.dtb \
diff --git a/arch/arm/dts/zynqmp-zc1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts
index 82c30a3fbe..c22de576a5 100644
--- a/arch/arm/dts/zynqmp-zc1275-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * dts file for Xilinx ZynqMP ZC1275
+ * dts file for Xilinx ZynqMP ZCU1275
*
* (C) Copyright 2017 - 2018, Xilinx, Inc.
*
@@ -14,8 +14,9 @@
#include "zynqmp-clk-ccf.dtsi"
/ {
- model = "ZynqMP ZC1275 RevA";
- compatible = "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
+ model = "ZynqMP ZCU1275 RevA";
+ compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275",
+ "xlnx,zynqmp";
aliases {
serial0 = &uart0;
diff --git a/arch/arm/dts/zynqmp-zc1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts
index 0473503afa..34c4becd43 100644
--- a/arch/arm/dts/zynqmp-zc1275-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * dts file for Xilinx ZynqMP ZC1275 RevB
+ * dts file for Xilinx ZynqMP ZCU1275 RevB
*
* (C) Copyright 2018, Xilinx, Inc.
*
@@ -14,8 +14,9 @@
#include "zynqmp-clk-ccf.dtsi"
/ {
- model = "ZynqMP ZC1275 RevB";
- compatible = "xlnx,zynqmp-zc1275-revB", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
+ model = "ZynqMP ZCU1275 RevB";
+ compatible = "xlnx,zynqmp-zcu1275-revB", "xlnx,zynqmp-zcu1275",
+ "xlnx,zynqmp";
aliases {
serial0 = &uart0;