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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-25 21:03:41 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-28 13:09:19 +0900
commit928f3248b3e81a9fdaa818cf3aa02e5daef7015d (patch)
treeeab07df3764574cf8761867762c640bae53914c9 /arch
parent4a89a24e26670921614a83098e5c0692de2be86e (diff)
downloadu-boot-928f3248b3e81a9fdaa818cf3aa02e5daef7015d.tar.gz
ARM: uniphier: support system reset functionality for PSCI
This supports the system reset via PSCI for ARMv7 SoCs. Because the system reset is not supported on PSCI 0.1, let's define CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there is no CONFIG to enable it in U-Boot for now.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-uniphier/arm32/psci.c5
-rw-r--r--arch/arm/mach-uniphier/reset.c14
2 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c
index 633a3e0840..e6682657be 100644
--- a/arch/arm/mach-uniphier/arm32/psci.c
+++ b/arch/arm/mach-uniphier/arm32/psci.c
@@ -151,3 +151,8 @@ int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point)
return PSCI_RET_SUCCESS;
}
+
+void __secure psci_system_reset(u32 function_id)
+{
+ reset_cpu(0);
+}
diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c
index b5825bc0c7..43e27d12c3 100644
--- a/arch/arm/mach-uniphier/reset.c
+++ b/arch/arm/mach-uniphier/reset.c
@@ -1,15 +1,25 @@
/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2012-2014 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/io.h>
+#include <asm/secure.h>
#include "sc-regs.h"
-void reset_cpu(unsigned long ignored)
+/* If PSCI is enabled, this is used for SYSTEM_RESET function */
+#ifdef CONFIG_ARMV7_PSCI
+#define __SECURE __secure
+#else
+#define __SECURE
+#endif
+
+void __SECURE reset_cpu(unsigned long ignored)
{
u32 tmp;