diff options
author | Tom Rini <trini@konsulko.com> | 2019-10-08 18:45:26 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2019-10-08 18:45:26 -0400 |
commit | efea5a34bb5be542630ce7161bd3b9cc26a0bcf3 (patch) | |
tree | fb747d83d81f9c3400a561782114e4c6ecd61a07 /arch/sandbox/lib/pci_io.c | |
parent | 9d536fe8ae7672bdee091f9100389b6f3e53cfc6 (diff) | |
parent | cc2d27dcdc3e1c76d09d54015e3992380bd7e0fa (diff) | |
download | u-boot-efea5a34bb5be542630ce7161bd3b9cc26a0bcf3.tar.gz |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
Diffstat (limited to 'arch/sandbox/lib/pci_io.c')
-rw-r--r-- | arch/sandbox/lib/pci_io.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c index 01822c6069..f22e47c7f6 100644 --- a/arch/sandbox/lib/pci_io.c +++ b/arch/sandbox/lib/pci_io.c @@ -91,7 +91,7 @@ static int pci_io_write(unsigned int addr, ulong value, pci_size_t size) return -ENOSYS; } -int inl(unsigned int addr) +int _inl(unsigned int addr) { unsigned long value; int ret; @@ -101,7 +101,7 @@ int inl(unsigned int addr) return ret ? 0 : value; } -int inw(unsigned int addr) +int _inw(unsigned int addr) { unsigned long value; int ret; @@ -111,7 +111,7 @@ int inw(unsigned int addr) return ret ? 0 : value; } -int inb(unsigned int addr) +int _inb(unsigned int addr) { unsigned long value; int ret; @@ -121,17 +121,17 @@ int inb(unsigned int addr) return ret ? 0 : value; } -void outl(unsigned int value, unsigned int addr) +void _outl(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_32); } -void outw(unsigned int value, unsigned int addr) +void _outw(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_16); } -void outb(unsigned int value, unsigned int addr) +void _outb(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_8); } |