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| author | York Sun <york.sun@nxp.com> | 2016-11-21 13:35:41 -0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-11-23 23:42:15 -0800 |
| commit | 26bc57da0ac1ed5769e53b0ef561fd4f08c020c7 (patch) | |
| tree | a6e6b3d40c3c3b29b8500aa7788eaa1842ef8567 /arch/powerpc/include/asm/immap_85xx.h | |
| parent | 652a7bbd87d322c49ffe138b98563dc6c8cd2885 (diff) | |
| download | u-boot-26bc57da0ac1ed5769e53b0ef561fd4f08c020c7.tar.gz | |
powerpc: T4240: Remove macro CONFIG_PPC_T4240
Use CONFIG_ARCH_T4240 from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/include/asm/immap_85xx.h')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 19ce7f3488..75868fa9f0 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1759,7 +1759,7 @@ typedef struct ccsr_gur { /* use reserved bits 18~23 as scratch space to host DDR PLL ratio */ #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_RESV_SHIFT 8 #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK 0x3f -#if defined(CONFIG_PPC_T4240) || defined(CONFIG_ARCH_T4160) || \ +#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \ defined(CONFIG_PPC_T4080) #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfc000000 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 26 @@ -1875,7 +1875,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII 0x00100000 #define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE 0x00180000 #endif -#if defined(CONFIG_PPC_T4240) || defined(CONFIG_ARCH_T4160) || \ +#if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \ defined(CONFIG_PPC_T4080) #define FSL_CORENET_RCWSR13_EC1 0x60000000 /* bits 417..418 */ #define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII 0x00000000 |