diff options
| author | Ruchika Gupta <ruchika.gupta@freescale.com> | 2014-09-09 11:50:31 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-10-16 14:16:50 -0700 |
| commit | 028dbb8db1d18c5835ab34659f9ef7a516571524 (patch) | |
| tree | b6c94157e8a8483a025b2ec4591df115422fe3ae /arch/powerpc/cpu/mpc85xx/liodn.c | |
| parent | 48ef0d2a1002d3da0bf7ed13d0959bcbf782c792 (diff) | |
| download | u-boot-028dbb8db1d18c5835ab34659f9ef7a516571524.tar.gz | |
fsl_sec : Change accessor function to take care of endianness
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.
So update acessor functions with common SEC acessor functions to take care
both type of endianness.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/liodn.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/liodn.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index 19e130e87f..7a2d4be42c 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -66,12 +66,12 @@ static void setup_sec_liodn_base(void) return; /* QILCR[QSLOM] */ - out_be32(&sec->qilcr_ms, 0x3ff<<16); + sec_out32(&sec->qilcr_ms, 0x3ff<<16); base = (liodn_bases[FSL_HW_PORTAL_SEC].id[0] << 16) | liodn_bases[FSL_HW_PORTAL_SEC].id[1]; - out_be32(&sec->qilcr_ls, base); + sec_out32(&sec->qilcr_ls, base); } #ifdef CONFIG_SYS_DPAA_FMAN |