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authorÁlvaro Fernández Rojas <noltari@gmail.com>2017-04-25 00:39:20 +0200
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2017-05-10 16:16:09 +0200
commitee422142f454d54f0ed39a2cbf083ff12e98a3e1 (patch)
treeba1a8bc79898349405ecd9955001be20548a4d1d /arch/mips/Kconfig
parent193030e5916960f101e1ba406510980452bc47b6 (diff)
downloadu-boot-ee422142f454d54f0ed39a2cbf083ff12e98a3e1.tar.gz
MIPS: add initial infrastructure for Broadcom MIPS SoCs
CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d97930e577..c97ea4156b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -75,6 +75,15 @@ config ARCH_ATH79
select OF_CONTROL
select DM
+config ARCH_BMIPS
+ bool "Support BMIPS SoCs"
+ select OF_CONTROL
+ select DM
+ select CLK
+ select CPU
+ select RAM
+ select SYSRESET
+
config MACH_PIC32
bool "Support Microchip PIC32"
select OF_CONTROL
@@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig"
source "board/pb1x00/Kconfig"
source "board/qemu-mips/Kconfig"
source "arch/mips/mach-ath79/Kconfig"
+source "arch/mips/mach-bmips/Kconfig"
source "arch/mips/mach-pic32/Kconfig"
if MIPS