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author | Michal Simek <michal.simek@xilinx.com> | 2014-01-21 07:30:37 +0100 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2014-02-04 16:39:50 +0100 |
commit | 9d24274509cdd463992dc1fb1a2820d6a4b6d21d (patch) | |
tree | aa599f1c017ae0a597daf3394e8a45ed3192396d /arch/microblaze/cpu/spl.c | |
parent | 22ff7f4d195b49ca7db5b2a0c3aa2c987ab88c34 (diff) | |
download | u-boot-9d24274509cdd463992dc1fb1a2820d6a4b6d21d.tar.gz |
microblaze: Add SPL support
Add support for U-BOOT SPL. NOR and RAM mode are supported.
There are 3 images in NOR flash. u-boot.img, dtb and kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/microblaze/cpu/spl.c')
-rw-r--r-- | arch/microblaze/cpu/spl.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c new file mode 100644 index 0000000000..091226133e --- /dev/null +++ b/arch/microblaze/cpu/spl.c @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2013 - 2014 Xilinx, Inc + * + * Michal Simek <michal.simek@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <image.h> +#include <spl.h> +#include <version.h> +#include <asm/io.h> +#include <asm/u-boot.h> + +DECLARE_GLOBAL_DATA_PTR; + +bool boot_linux; + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_NOR; +} + +/* Board initialization after bss clearance */ +void spl_board_init(void) +{ + gd = (gd_t *)CONFIG_SPL_STACK_ADDR; + + /* enable console uart printing */ + preloader_console_init(); +} + +#ifdef CONFIG_SPL_OS_BOOT +void __noreturn jump_to_image_linux(void *arg) +{ + debug("Entering kernel arg pointer: 0x%p\n", arg); + typedef void (*image_entry_arg_t)(char *, ulong, ulong) + __attribute__ ((noreturn)); + image_entry_arg_t image_entry = + (image_entry_arg_t)spl_image.entry_point; + + image_entry(NULL, 0, (ulong)arg); +} +#endif /* CONFIG_SPL_OS_BOOT */ + +int spl_start_uboot(void) +{ +#ifdef CONFIG_SPL_OS_BOOT + if (boot_linux) + return 0; +#endif + + return 1; +} |