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| author | Peng Fan <peng.fan@nxp.com> | 2019-12-27 10:19:42 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-01-08 13:20:08 +0100 |
| commit | a07c7181296fe02f36eaf1b902bc37a101b2802d (patch) | |
| tree | 86f1ecac2b36c1bac4e6d4df944e42a463b1150a /arch/arm | |
| parent | 625b03d8105044fe6fd9428f4cec464aecfdeb9b (diff) | |
| download | u-boot-a07c7181296fe02f36eaf1b902bc37a101b2802d.tar.gz | |
imx8mp: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 9a039ce127..7fcbd53f30 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -57,7 +57,7 @@ void enable_tzc380(void) /* Enable TZASC and lock setting */ setbits_le32(&gpr->gpr[10], GPR_TZASC_EN); setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK); - if (is_imx8mm() || is_imx8mn()) + if (is_imx8mm() || is_imx8mn() || is_imx8mp()) setbits_le32(&gpr->gpr[10], BIT(1)); /* * set Region 0 attribute to allow secure and non-secure |