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author | Vignesh Raghavendra <vigneshr@ti.com> | 2021-02-09 13:38:48 +0530 |
---|---|---|
committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-02-16 10:29:57 +0530 |
commit | 1e8f246563df822becdf909919d5e7667165f70f (patch) | |
tree | 382ea538e72ce49be88698a3ea4867a886292d06 /arch/arm | |
parent | 767582cd4c755c52bce3e1813bc462f37047cb5c (diff) | |
download | u-boot-1e8f246563df822becdf909919d5e7667165f70f.tar.gz |
ARM: dts: k3-j7200-common-proc-board-u-boot: Fix broken ethernet
Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts
into U-Boot") ranges have been added to CPSW node which results in
U-Boot CPSW driver failing to acquire phy_gmii_sel register range and
thus failing to configure GMII mode correctly.
Fix this by deleting ranges in -u-boot-dtsi just like its done for other
K3 platforms.
Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi index e52f7e1e86..bd037be350 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi @@ -114,6 +114,7 @@ reg = <0x0 0x46000000 0x0 0x200000>, <0x0 0x40f00200 0x0 0x8>; reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; cpsw-phy-sel@40f04040 { compatible = "ti,am654-cpsw-phy-sel"; |