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author | Rasmus Villemoes <rasmus.villemoes@prevas.dk> | 2019-09-10 08:32:01 +0000 |
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committer | Stefano Babic <sbabic@denx.de> | 2020-01-07 10:26:57 +0100 |
commit | b6e7ef4bf71bc0927dea35fdec0a653a82ae57a7 (patch) | |
tree | 6b870c89ecf8a4168546bea92c6f865c9143cd3c /arch/arm | |
parent | b1278a8e3eb1a18e65bf24f8ca338460d0ef0278 (diff) | |
download | u-boot-b6e7ef4bf71bc0927dea35fdec0a653a82ae57a7.tar.gz |
ARM: mxs: spl_boot.c: make early_delay more robust
It's true that booting normally doesn't take long enough for the
register to roll (which actually happens in a little over an hour, not
just a few seconds). However, the counter starts at power-on, and if
the board is held in reset to be booted over USB, one actually risks
hitting wrap-around during boot, which can both result in too short
delays (if the "st += delay" calculation makes st small) and
theoretically also unbound delays (if st ends up being UINT_MAX and
one just misses sampling digctl_microseconds at that point).
It doesn't take more code to DTRT, and once bitten, twice shy.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 5b3b51ce15..9168b91f27 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -25,9 +25,7 @@ static bd_t bdata __section(".data"); /* * This delay function is intended to be used only in early stage of boot, where - * clock are not set up yet. The timer used here is reset on every boot and - * takes a few seconds to roll. The boot doesn't take that long, so to keep the - * code simple, it doesn't take rolling into consideration. + * clock are not set up yet. */ void early_delay(int delay) { @@ -35,8 +33,7 @@ void early_delay(int delay) (struct mxs_digctl_regs *)MXS_DIGCTL_BASE; uint32_t st = readl(&digctl_regs->hw_digctl_microseconds); - st += delay; - while (st > readl(&digctl_regs->hw_digctl_microseconds)) + while (readl(&digctl_regs->hw_digctl_microseconds) - st <= delay) ; } |