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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2017-05-12 15:04:11 +0530
committerMichal Simek <michal.simek@xilinx.com>2017-06-20 16:41:44 +0200
commitd84bd9284ea05412928e5b95d4aaebfce18fef7c (patch)
treed712d01be1809b0046e66be214923a5233b6bd27 /arch/arm/mach-zynq
parent6a1d91be318b44365dfe095a9ca7df1619abefc9 (diff)
downloadu-boot-d84bd9284ea05412928e5b95d4aaebfce18fef7c.tar.gz
arm: zynq: Add Kconfig option for any DDR specific initialization
Add Kconfig option for ddr init as this might be required in cases like ddr less systems where we want to skip ddrc init and this option is useful for it. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq')
-rw-r--r--arch/arm/mach-zynq/Kconfig8
-rw-r--r--arch/arm/mach-zynq/ddrc.c4
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 2529c9ff44..c428ce5cc7 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -24,6 +24,14 @@ config SPL_SPI_FLASH_SUPPORT
config SPL_SPI_SUPPORT
default y if ZYNQ_QSPI
+config ZYNQ_DDRC_INIT
+ bool "Zynq DDRC initialization"
+ default y
+ help
+ This option used to perform DDR specific initialization
+ if required. There might be cases like ddr less where we
+ want to skip ddr init and this option is useful for it.
+
config SYS_BOARD
default "zynq"
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c
index d74f8dbbc4..bde52d6562 100644
--- a/arch/arm/mach-zynq/ddrc.c
+++ b/arch/arm/mach-zynq/ddrc.c
@@ -12,6 +12,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_ZYNQ_DDRC_INIT
+void zynq_ddrc_init(void) {}
+#else
/* Control regsiter bitfield definitions */
#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK 0xC
#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT 2
@@ -46,3 +49,4 @@ void zynq_ddrc_init(void)
puts("ECC disabled ");
}
}
+#endif