stm32mp1: add 800 MHz profile support

The STM32MP1 series is available in 3 different lines which are pin-to-pin
compatible:
- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
              3D GPU, DSI display interface and CAN FD
- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
              and CAN FD
- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz

Each line comes with a security option (cryptography & secure boot)
& a Cortex-A frequency option :

- A : Cortex-A7 @ 650 MHz
- C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- D : Cortex-A7 @ 800 MHz
- F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz

This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c
index a3db86dc46..3ee7d6a833 100644
--- a/arch/arm/mach-stm32mp/fdt.c
+++ b/arch/arm/mach-stm32mp/fdt.c
@@ -244,6 +244,8 @@ int ft_system_setup(void *blob, bd_t *bd)
 	get_soc_name(name);
 
 	switch (cpu) {
+	case CPU_STM32MP151Fxx:
+	case CPU_STM32MP151Dxx:
 	case CPU_STM32MP151Cxx:
 	case CPU_STM32MP151Axx:
 		stm32_fdt_fixup_cpu(blob, name);
@@ -251,6 +253,8 @@ int ft_system_setup(void *blob, bd_t *bd)
 		soc = fdt_path_offset(blob, "/soc");
 		stm32_fdt_disable(blob, soc, STM32_FDCAN_BASE, "can", name);
 		/* fall through */
+	case CPU_STM32MP153Fxx:
+	case CPU_STM32MP153Dxx:
 	case CPU_STM32MP153Cxx:
 	case CPU_STM32MP153Axx:
 		stm32_fdt_disable(blob, soc, STM32_GPU_BASE, "gpu", name);
@@ -261,8 +265,11 @@ int ft_system_setup(void *blob, bd_t *bd)
 	}
 
 	switch (cpu) {
+	case CPU_STM32MP157Dxx:
 	case CPU_STM32MP157Axx:
+	case CPU_STM32MP153Dxx:
 	case CPU_STM32MP153Axx:
+	case CPU_STM32MP151Dxx:
 	case CPU_STM32MP151Axx:
 		stm32_fdt_disable(blob, soc, STM32_CRYP1_BASE, "cryp", name);
 		stm32_fdt_disable(blob, soc, STM32_CRYP2_BASE, "cryp", name);