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authorAng, Chee Hong <chee.hong.ang@intel.com>2019-05-03 01:18:27 -0700
committerMarek Vasut <marex@denx.de>2019-05-06 12:44:45 +0200
commit32e308dd796f34f85d1c088e3218fa3403a9080f (patch)
tree32bd274c80d04abc847c38b32dca225ac4ef15bd /arch/arm/mach-socfpga
parenta03e9d9fe5e2645be1c053b2765cfe6a9126d362 (diff)
downloadu-boot-32e308dd796f34f85d1c088e3218fa3403a9080f.tar.gz
ARM: socfpga: stratix10: Probe FPGA status before bridge enable
Send CONFIG_STATUS and RECONFIG_STATUS mailbox commands to Secure Device Manager (SDM) to get the status of FPGA and make sure the FPGA is in user mode before enable the bridge. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r--arch/arm/mach-socfpga/misc_s10.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index 60c96090ce..29abc4a54c 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -16,6 +16,7 @@
#include <asm/arch/misc.h>
#include <asm/pl310.h>
#include <linux/libfdt.h>
+#include <asm/arch/mailbox_s10.h>
#include <dt-bindings/reset/altr,rst-mgr-s10.h>
@@ -152,5 +153,16 @@ int arch_early_init_r(void)
void do_bridge_reset(int enable, unsigned int mask)
{
+ /* Check FPGA status before bridge enable */
+ if (enable) {
+ int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
+
+ if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
+ ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
+
+ if (ret)
+ return;
+ }
+
socfpga_bridges_reset(enable);
}