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author | Sheep Sun <sunxiaoyang2003@gmail.com> | 2021-06-20 10:34:35 +0800 |
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committer | Tom Rini <trini@konsulko.com> | 2021-07-06 14:12:15 -0400 |
commit | 6d430e11a86463745eeaec9292401ffbdfbc07d3 (patch) | |
tree | 3dda9cb32a1a9fbfd163031bb256cd3afac2cf59 /arch/arm/mach-snapdragon | |
parent | 9b6b25c63512604bb17a40a6005dff451699ef5e (diff) | |
download | u-boot-6d430e11a86463745eeaec9292401ffbdfbc07d3.tar.gz |
arm: snapdragon: Fix typo in clk_bcr_update()
Fix typo in clock-snapdragon.c
Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
Diffstat (limited to 'arch/arm/mach-snapdragon')
-rw-r--r-- | arch/arm/mach-snapdragon/clock-snapdragon.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c index fbe0b5212f..2b76371718 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c @@ -56,15 +56,15 @@ void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk) } while ((val != BRANCH_ON_VAL) && (val != BRANCH_NOC_FSM_ON_VAL)); } -#define APPS_CMD_RGCR_UPDATE BIT(0) +#define APPS_CMD_RCGR_UPDATE BIT(0) -/* Update clock command via CMD_RGCR */ -void clk_bcr_update(phys_addr_t apps_cmd_rgcr) +/* Update clock command via CMD_RCGR */ +void clk_bcr_update(phys_addr_t apps_cmd_rcgr) { - setbits_le32(apps_cmd_rgcr, APPS_CMD_RGCR_UPDATE); + setbits_le32(apps_cmd_rcgr, APPS_CMD_RCGR_UPDATE); /* Wait for frequency to be updated. */ - while (readl(apps_cmd_rgcr) & APPS_CMD_RGCR_UPDATE) + while (readl(apps_cmd_rcgr) & APPS_CMD_RCGR_UPDATE) ; } |