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author | Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> | 2018-01-10 11:33:50 +0100 |
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committer | Tom Rini <trini@konsulko.com> | 2018-01-15 16:29:02 -0500 |
commit | 4b684a6b82572654b7398d871aa138398c2b18c7 (patch) | |
tree | 66aaaaa9f44d7d26f6509caca78fe35d1f4c68e7 /arch/arm/mach-snapdragon/sysmap-apq8096.c | |
parent | 7c75f7f1b29eb53912b75472f4d8135c465f87f5 (diff) | |
download | u-boot-4b684a6b82572654b7398d871aa138398c2b18c7.tar.gz |
db820c: add qualcomm dragonboard 820C support
This commit adds support for 96Boards Dragonboard820C.
The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.
Features
- 4x Kyro CPU (64 bit) up to 2.15GHz
- USB2.0
- USB3.0
- ISP
- Qualcomm Hexagon DSP
- SD 3.0 (UHS-I)
- UFS 2.0
- Qualcomm Adreno 530 GPU
- GPS
- BT 4.2
- Wi-Fi 2.4GHz, 5GHz (802.11ac)
- PCIe 2.0
- MIPI-CSI, MIPI-DSI
- I2S
U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.
For detailed build instructions see readme.txt in the board directory.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Diffstat (limited to 'arch/arm/mach-snapdragon/sysmap-apq8096.c')
-rw-r--r-- | arch/arm/mach-snapdragon/sysmap-apq8096.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/mach-snapdragon/sysmap-apq8096.c b/arch/arm/mach-snapdragon/sysmap-apq8096.c new file mode 100644 index 0000000000..cb6d1e475b --- /dev/null +++ b/arch/arm/mach-snapdragon/sysmap-apq8096.c @@ -0,0 +1,32 @@ +/* + * Qualcomm APQ8096 memory map + * + * (C) Copyright 2017 Jorge Ramirez Ortiz <jorge.ramirez-ortiz@linaro.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/armv8/mmu.h> + +static struct mm_region apq8096_mem_map[] = { + { + .virt = 0x0UL, /* Peripheral block */ + .phys = 0x0UL, /* Peripheral block */ + .size = 0x10000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x80000000UL, /* DDR */ + .phys = 0x80000000UL, /* DDR */ + .size = 0xC0000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = apq8096_mem_map; |