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authorStefan Roese <sr@denx.de>2015-07-01 12:55:07 +0200
committerLuka Perkov <luka.perkov@sartura.hr>2015-08-17 18:48:34 +0200
commit8ed20d65010d46fd58121ea9ee9c913abc3d8e13 (patch)
tree81d9385f68d132682aba3aeffc7ecdfc0d1faae6 /arch/arm/mach-mvebu/cpu.c
parent2bd8711ef019ee4247e80a3dfd789f47f26f28f9 (diff)
downloadu-boot-8ed20d65010d46fd58121ea9ee9c913abc3d8e13.tar.gz
arm: mvebu: Change MBUS base addresses and sizes
This patch changes the MBUS base addresses and sizes to use more generic names and also adds defines for the sizes. It also moves the base address to higher addresses. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'arch/arm/mach-mvebu/cpu.c')
-rw-r--r--arch/arm/mach-mvebu/cpu.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 9496d5fc5b..7335620f2b 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -19,18 +19,20 @@
static struct mbus_win windows[] = {
/* PCIE MEM address space */
- { DEFADR_PCI_MEM, 256 << 20, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
+ { MBUS_PCI_MEM_BASE, MBUS_PCI_MEM_SIZE,
+ CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
/* PCIE IO address space */
- { DEFADR_PCI_IO, 64 << 10, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
+ { MBUS_PCI_IO_BASE, MBUS_PCI_IO_SIZE,
+ CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
/* SPI */
- { DEFADR_SPIF, 8 << 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
- CPU_ATTR_SPIFLASH },
+ { MBUS_SPI_BASE, MBUS_SPI_SIZE,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPIFLASH },
/* NOR */
- { DEFADR_BOOTROM, 8 << 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
- CPU_ATTR_BOOTROM },
+ { MBUS_BOOTROM_BASE, MBUS_BOOTROM_SIZE,
+ CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_BOOTROM },
};
void reset_cpu(unsigned long ignored)