diff options
author | Lukasz Majewski <lukma@denx.de> | 2018-12-05 17:04:02 +0100 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2019-02-15 12:16:50 +0100 |
commit | 548cc1095f290a0787476d61de32213a9195ff7b (patch) | |
tree | c6734207c165bd38a469537247052df67c5c73fa /arch/arm/mach-imx/Kconfig | |
parent | c5b22a5360662597511bebf95058c9dc777ee788 (diff) | |
download | u-boot-548cc1095f290a0787476d61de32213a9195ff7b.tar.gz |
ddr: vybrid: Provide code to perform on-boot calibration
This patch provides the code to calibrate the DDR's
DQS to DQ signals (RDLVL).
It is based on:
VFxxx Controller Reference Manual, Rev. 0, 10/2016, page 1600
10.1.6.16.4.1 "Software Read Leveling in MC Evaluation Mode"
and NXP's community thread:
"Vybrid: About DDR leveling feature on DDRMC."
https://community.nxp.com/thread/395323
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'arch/arm/mach-imx/Kconfig')
-rw-r--r-- | arch/arm/mach-imx/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index a1566cc2ad..8631fbd481 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -78,3 +78,15 @@ config NXP_BOARD_REVISION NXP boards based on i.MX6/7 contain the board revision information stored in the fuses. Select this option if you want to be able to retrieve the board revision information. + +config DDRMC_VF610_CALIBRATION + bool "Enable DDRMC (DDR3) on-chip calibration" + depends on ARCH_VF610 + help + Vybrid (vf610) SoC provides some on-chip facility to tune the DDR3 + memory parameters. Select this option if you want to calculate them + at boot time. + NOTE: + NXP does NOT recommend to perform this calibration at each boot. One + shall perform it on a new PCB and then use those values to program + the ddrmc_cr_setting on relevant board file. |