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| author | Wenyou Yang <wenyou.yang@atmel.com> | 2015-11-05 16:37:49 +0800 |
|---|---|---|
| committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-11-30 22:27:53 +0100 |
| commit | 5cb9dfa031c01ed747a11b18bdf64ba598a3597f (patch) | |
| tree | be49ac084e4af2b873f702d95be21f419a78025f /arch/arm/mach-at91/matrix.c | |
| parent | 75238f236735467d53916aa5bdafbe89ce94f9fb (diff) | |
| download | u-boot-5cb9dfa031c01ed747a11b18bdf64ba598a3597f.tar.gz | |
arm: at91/spl: matrix: move matrix init to separate file
To make the matrix initialization code sharing with other SoCs,
move it from SAMA5D4 particular file,
mach-at91/armv7/sama5d4_devices.c to a separate file,
mach-at91/matrix.c
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch/arm/mach-at91/matrix.c')
| -rw-r--r-- | arch/arm/mach-at91/matrix.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c new file mode 100644 index 0000000000..cf363861c6 --- /dev/null +++ b/arch/arm/mach-at91/matrix.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2015 Atmel Corporation + * Wenyou Yang <wenyou.yang@atmel.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sama5_matrix.h> + +void matrix_init(void) +{ + struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0; + struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; + int i; + + /* Disable the write protect */ + writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); + writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); + + /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ + for (i = 4; i <= 10; i++) { + writel(0x000f0f0f, &h64mx->ssr[i]); + writel(0x0000ffff, &h64mx->sassr[i]); + writel(0x0000000f, &h64mx->srtsr[i]); + } + + /* CS3 */ + writel(0x00c0c0c0, &h32mx->ssr[3]); + writel(0xff000000, &h32mx->sassr[3]); + writel(0xff000000, &h32mx->srtsr[3]); + + /* NFC SRAM */ + writel(0x00010101, &h32mx->ssr[4]); + writel(0x00000001, &h32mx->sassr[4]); + writel(0x00000001, &h32mx->srtsr[4]); + + /* Configure Programmable Security peripherals on matrix 64 */ + writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]); + writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]); + writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]); + + /* Configure Programmable Security peripherals on matrix 32 */ + writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); + writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]); + + /* Enable the write protect */ + writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); + writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); +} |