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author | Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com> | 2020-10-23 16:20:38 +0530 |
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committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-10-23 16:52:09 +0530 |
commit | c760095adbf222aefba00404b38a25bf5dee0909 (patch) | |
tree | 966a0b2a3362803a6530e1f64a394517767ee5b0 /arch/arm/include/asm | |
parent | d5d6b548d950385cb66e1fa97ad5f6790bbca3ad (diff) | |
download | u-boot-c760095adbf222aefba00404b38a25bf5dee0909.tar.gz |
net: lx2160a.c: Update to set ECx_PMUX precedence
As per hardware documentation, ECx_PMUX has precedence
over SerDes protocol.
For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII
through SerDes protocol but ECx_PMUX configured them as RGMII,
then the ports will be configured as RGMII and not SGMII.
Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index baa9fa8529..24a64b7575 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -396,7 +396,7 @@ struct ccsr_gur { #define FSL_CHASSIS3_EC2_REGSR 27 #define FSL_CHASSIS3_EC1_REGSR_PRTCL_MASK 0x00000003 #define FSL_CHASSIS3_EC1_REGSR_PRTCL_SHIFT 0 -#define FSL_CHASSIS3_EC2_REGSR_PRTCL_MASK 0x00000007 +#define FSL_CHASSIS3_EC2_REGSR_PRTCL_MASK 0x0000000C #define FSL_CHASSIS3_EC2_REGSR_PRTCL_SHIFT 2 #define FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK 0x001F0000 #define FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT 16 |