diff options
| author | Patrice Chotard <patrice.chotard@st.com> | 2017-12-12 09:49:39 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-10 08:05:46 -0500 |
| commit | 4a56fd484a2e4a02ab372d299d0231002035f3ff (patch) | |
| tree | 52380a94ee6cba8cf7c7e542ccbf95dc9555739f /arch/arm/include/asm/arch-stm32f4 | |
| parent | dcb11959d85596982c935040b8b6d237f31e7e4d (diff) | |
| download | u-boot-4a56fd484a2e4a02ab372d299d0231002035f3ff.tar.gz | |
board: stm32f429-disco: switch to DM STM32 clock driver
Use available DM clk_stm32f.c driver instead of dedicated
mach-stm32/stm32f4/clock.c.
Migrate periph_clock defines from stm32_periph.h directly in
CLK driver. These periph_clock defines will be removed when STMMAC,
TIMER2 and SYSCFG drivers will support DM CLK.
Enable also CLK flag.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/include/asm/arch-stm32f4')
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f4/stm32.h | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h index bd5c2ecdcb..889778cfd5 100644 --- a/arch/arm/include/asm/arch-stm32f4/stm32.h +++ b/arch/arm/include/asm/arch-stm32f4/stm32.h @@ -42,11 +42,6 @@ struct stm32_u_id_regs { u32 u_id_high; }; -struct stm32_pwr_regs { - u32 cr; - u32 csr; -}; - /* * Registers access macros */ @@ -56,9 +51,6 @@ struct stm32_pwr_regs { #define STM32_RCC_BASE (STM32_AHB1PERIPH_BASE + 0x3800) #define STM32_RCC ((struct stm32_rcc_regs *)STM32_RCC_BASE) -#define STM32_PWR_BASE (STM32_APB1PERIPH_BASE + 0x7000) -#define STM32_PWR ((struct stm32_pwr_regs *)STM32_PWR_BASE) - #define FLASH_CNTL_BASE (STM32_AHB1PERIPH_BASE + 0x3C00) static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = { @@ -67,15 +59,6 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = { [5 ... 11] = 128 * 1024 }; -enum clock { - CLOCK_CORE, - CLOCK_AHB, - CLOCK_APB1, - CLOCK_APB2 -}; - -int configure_clocks(void); -unsigned long clock_get(enum clock clck); void stm32_flash_latency_cfg(int latency); #endif /* _MACH_STM32_H_ */ |