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author | Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> | 2015-03-31 11:40:45 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-04-10 14:23:07 +0200 |
commit | 5e862b95399e6e5ea7748ee29a38756685d622fd (patch) | |
tree | 030286526ba8325c0df98b1f4a2f8c60a034a4c1 /arch/arm/include/asm/arch-lpc32xx/cpu.h | |
parent | c8381bf435ddb104594df00411a8ebd049dd753c (diff) | |
download | u-boot-5e862b95399e6e5ea7748ee29a38756685d622fd.tar.gz |
lpc32xx: i2c: add LPC32xx I2C interface support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Diffstat (limited to 'arch/arm/include/asm/arch-lpc32xx/cpu.h')
-rw-r--r-- | arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-lpc32xx/cpu.h b/arch/arm/include/asm/arch-lpc32xx/cpu.h index 199b4a026b..1067107b64 100644 --- a/arch/arm/include/asm/arch-lpc32xx/cpu.h +++ b/arch/arm/include/asm/arch-lpc32xx/cpu.h @@ -37,6 +37,8 @@ #define UART4_BASE 0x40088000 /* UART 4 registers base */ #define UART5_BASE 0x40090000 /* UART 5 registers base */ #define UART6_BASE 0x40098000 /* UART 6 registers base */ +#define I2C1_BASE 0x400A0000 /* I2C 1 registers base */ +#define I2C2_BASE 0x400A8000 /* I2C 2 registers base */ /* External SDRAM Memory Bank base addresses */ #define EMC_DYCS0_BASE 0x80000000 /* SDRAM DYCS0 base address */ |