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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-08-02 19:03:27 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:07:13 -0700 |
| commit | b392a6d4b05b7409283cd75b4ac6bd12018d187a (patch) | |
| tree | 272b0b5b8780f23ed8fc102d09c97d94c9dbe7e6 /arch/arm/include/asm/arch-fsl-layerscape/soc.h | |
| parent | 664b6520582fcea7e150f57258c7a63627837318 (diff) | |
| download | u-boot-b392a6d4b05b7409283cd75b4ac6bd12018d187a.tar.gz | |
fsl-layerscape: Add workaround for PCIe erratum A010315
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 8d4a7adb1d..4512732f79 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -100,6 +100,10 @@ void cpu_name(char *name); void erratum_a009635(void); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A010315 +void erratum_a010315(void); +#endif + bool soc_has_dp_ddr(void); bool soc_has_aiop(void); #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */ |