imx: reorganize IMX code as other SOCs

Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

1 files changed, 0 insertions, 149 deletions

diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
deleted file mode 100644
index c9a3bf29a5..0000000000
--- a/arch/arm/imx-common/iomux-v3.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Based on the iomux-v3.c from Linux kernel:
- * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
- * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
- *                       <armlinux@phytec.de>
- *
- * Copyright (C) 2004-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/imx-common/iomux-v3.h>
-#include <asm/imx-common/sys_proto.h>
-
-static void *base = (void *)IOMUXC_BASE_ADDR;
-
-/*
- * configures a single pad in the iomuxer
- */
-void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
-{
-	u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT;
-	u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT;
-	u32 sel_input_ofs =
-		(pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT;
-	u32 sel_input =
-		(pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT;
-	u32 pad_ctrl_ofs =
-		(pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT;
-	u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT;
-
-#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
-	/* Check whether LVE bit needs to be set */
-	if (pad_ctrl & PAD_CTL_LVE) {
-		pad_ctrl &= ~PAD_CTL_LVE;
-		pad_ctrl |= PAD_CTL_LVE_BIT;
-	}
-#endif
-
-#ifdef CONFIG_IOMUX_LPSR
-	u32 lpsr = (pad & MUX_MODE_LPSR) >> MUX_MODE_SHIFT;
-
-#ifdef CONFIG_MX7
-	if (lpsr == IOMUX_CONFIG_LPSR) {
-		base = (void *)IOMUXC_LPSR_BASE_ADDR;
-		mux_mode &= ~IOMUX_CONFIG_LPSR;
-		/* set daisy chain sel_input */
-		if (sel_input_ofs)
-			sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS;
-	}
-#else
-	if (is_mx6ull() || is_mx6sll()) {
-		if (lpsr == IOMUX_CONFIG_LPSR) {
-			base = (void *)IOMUXC_SNVS_BASE_ADDR;
-			mux_mode &= ~IOMUX_CONFIG_LPSR;
-		}
-	}
-#endif
-#endif
-
-	if (is_mx7() || is_mx6ull() || is_mx6sll() || mux_ctrl_ofs)
-		__raw_writel(mux_mode, base + mux_ctrl_ofs);
-
-	if (sel_input_ofs)
-		__raw_writel(sel_input, base + sel_input_ofs);
-
-#ifdef CONFIG_IOMUX_SHARE_CONF_REG
-	if (!(pad_ctrl & NO_PAD_CTRL))
-		__raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl,
-			base + pad_ctrl_ofs);
-#else
-	if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
-		__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
-#if defined(CONFIG_MX6SLL)
-	else if ((pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
-		clrbits_le32(base + pad_ctrl_ofs, PAD_CTL_IPD_BIT);
-#endif
-#endif
-
-#ifdef CONFIG_IOMUX_LPSR
-	if (lpsr == IOMUX_CONFIG_LPSR)
-		base = (void *)IOMUXC_BASE_ADDR;
-#endif
-
-}
-
-/* configures a list of pads within declared with IOMUX_PADS macro */
-void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
-				      unsigned count)
-{
-	iomux_v3_cfg_t const *p = pad_list;
-	int stride;
-	int i;
-
-#if defined(CONFIG_MX6QDL)
-	stride = 2;
-	if (!is_mx6dq() && !is_mx6dqp())
-		p += 1;
-#else
-	stride = 1;
-#endif
-	for (i = 0; i < count; i++) {
-		imx_iomux_v3_setup_pad(*p);
-		p += stride;
-	}
-}
-
-void imx_iomux_set_gpr_register(int group, int start_bit,
-					int num_bits, int value)
-{
-	int i = 0;
-	u32 reg;
-	reg = readl(base + group * 4);
-	while (num_bits) {
-		reg &= ~(1<<(start_bit + i));
-		i++;
-		num_bits--;
-	}
-	reg |= (value << start_bit);
-	writel(reg, base + group * 4);
-}
-
-#ifdef CONFIG_IOMUX_SHARE_CONF_REG
-void imx_iomux_gpio_set_direction(unsigned int gpio,
-				unsigned int direction)
-{
-	u32 reg;
-	/*
-	 * Only on Vybrid the input/output buffer enable flags
-	 * are part of the shared mux/conf register.
-	 */
-	reg = readl(base + (gpio << 2));
-
-	if (direction)
-		reg |= 0x2;
-	else
-		reg &= ~0x2;
-
-	writel(reg, base + (gpio << 2));
-}
-
-void imx_iomux_gpio_get_function(unsigned int gpio, u32 *gpio_state)
-{
-	*gpio_state = readl(base + (gpio << 2)) &
-		((0X07 << PAD_MUX_MODE_SHIFT) | PAD_CTL_OBE_IBE_ENABLE);
-}
-#endif