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author | Andre Przywara <andre.przywara@arm.com> | 2018-07-04 14:16:38 +0100 |
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committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-07-16 12:03:16 +0530 |
commit | 2d0c3d6b168854260aa2e80852d3d618aa3347e9 (patch) | |
tree | 91f9f3682a05b4910f0b62337913412a657db164 /arch/arm/dts/sun8i-h3-nanopi.dtsi | |
parent | 1caeae375f075e9fa7c85807908e07b095e4ccdc (diff) | |
download | u-boot-2d0c3d6b168854260aa2e80852d3d618aa3347e9.tar.gz |
sunxi: DT: H3: update board .dts files from Linux
Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Mon Jun 11 17:57:38 2018 -0700
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/dts/sun8i-h3-nanopi.dtsi')
-rw-r--r-- | arch/arm/dts/sun8i-h3-nanopi.dtsi | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm/dts/sun8i-h3-nanopi.dtsi b/arch/arm/dts/sun8i-h3-nanopi.dtsi index 8b1b250bda..f110ee3822 100644 --- a/arch/arm/dts/sun8i-h3-nanopi.dtsi +++ b/arch/arm/dts/sun8i-h3-nanopi.dtsi @@ -81,7 +81,7 @@ pinctrl-names = "default"; pinctrl-0 = <&sw_r_npi>; - k1@0 { + k1 { label = "k1"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; @@ -95,8 +95,7 @@ &mmc0 { bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; - cd-inverted; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; status = "okay"; vmmc-supply = <®_vcc3v3>; }; @@ -106,19 +105,19 @@ }; &pio { - leds_npi: led_pins@0 { + leds_npi: led_pins { pins = "PA10"; function = "gpio_out"; }; }; &r_pio { - leds_r_npi: led_pins@0 { + leds_r_npi: led_pins { pins = "PL10"; function = "gpio_out"; }; - sw_r_npi: key_pins@0 { + sw_r_npi: key_pins { pins = "PL3"; function = "gpio_in"; }; |