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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-10-15 22:04:08 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-10-20 22:48:28 +0200 |
| commit | f0e8e8dacf60e8f44e77402102b6d67ae8f347c8 (patch) | |
| tree | 9c542dbf95b57aee995c039a26454f6f4b70975c /arch/arm/dts/sun5i-a13.dtsi | |
| parent | 44c798799f667310ce29ce264be5c4bff7a21cf2 (diff) | |
| download | u-boot-f0e8e8dacf60e8f44e77402102b6d67ae8f347c8.tar.gz | |
sun5i: Sync the DTSI with the kernel
Add the latest kernel changes to the sun5i family DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/dts/sun5i-a13.dtsi')
| -rw-r--r-- | arch/arm/dts/sun5i-a13.dtsi | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi index 976d4faa21..d910d3a6c4 100644 --- a/arch/arm/dts/sun5i-a13.dtsi +++ b/arch/arm/dts/sun5i-a13.dtsi @@ -104,6 +104,16 @@ compatible = "allwinner,sun5i-a13-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; + clock-indices = <0>, <1>, + <2>, <5>, <6>, + <7>, <8>, <9>, + <10>, <13>, + <14>, <20>, + <21>, <22>, + <28>, <32>, <36>, + <40>, <44>, + <46>, <51>, + <52>; clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", @@ -121,6 +131,8 @@ compatible = "allwinner,sun5i-a13-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; + clock-indices = <0>, <5>, + <6>; clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir"; }; @@ -130,8 +142,22 @@ compatible = "allwinner,sun5i-a13-apb1-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb1>; + clock-indices = <0>, <1>, + <2>, <17>, + <19>; clock-output-names = "apb1_i2c0", "apb1_i2c1", - "apb1_i2c2", "apb1_uart1", "apb1_uart3"; + "apb1_i2c2", "apb1_uart1", + "apb1_uart3"; + }; + }; + + soc@01c00000 { + pwm: pwm@01c20e00 { + compatible = "allwinner,sun5i-a13-pwm"; + reg = <0x01c20e00 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; }; }; }; |