diff options
author | Eric Gao <eric.gao@rock-chips.com> | 2017-05-02 18:23:56 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2017-05-10 13:37:22 -0600 |
commit | df8fe99cf20ed2bf0d33e00177a35cbd3bddb6a4 (patch) | |
tree | 7a263a162b6b67418b453023d2883a755f2bf622 /arch/arm/dts/rk3399.dtsi | |
parent | 028d6849014a4fcea9fd6514b1be959ee7e01b9e (diff) | |
download | u-boot-df8fe99cf20ed2bf0d33e00177a35cbd3bddb6a4.tar.gz |
rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch/arm/dts/rk3399.dtsi')
-rw-r--r-- | arch/arm/dts/rk3399.dtsi | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index bafa40a1f9..f3d3f53f7a 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -1402,6 +1402,77 @@ status = "disabled"; }; + vopl: vop@ff8f0000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-vop-lit"; + reg = <0x0 0xff8f0000 0x0 0x3efc>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>; + reset-names = "axi", "ahb", "dclk"; + status = "disabled"; + vopl_out: port { + #address-cells = <1>; + #size-cells = <0>; + vopl_out_mipi: endpoint@0 { + reg = <3>; + remote-endpoint = <&mipi_in_vopl>; + }; + }; + }; + + vopb: vop@ff900000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-vop-big"; + reg = <0x0 0xff900000 0x0 0x3efc>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; + #clock-cells = <0>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>; + reset-names = "axi", "ahb", "dclk"; + status = "disabled"; + vopb_out: port { + #address-cells = <1>; + #size-cells = <0>; + vopb_out_mipi: endpoint@0 { + reg = <3>; + remote-endpoint = <&mipi_in_vopb>; + }; + }; + }; + + mipi_dsi: mipi@ff960000 { + compatible = "rockchip,rk3399_mipi_dsi"; + reg = <0x0 0xff960000 0x0 0x8000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, + <&cru SCLK_DPHY_TX0_CFG>; + clock-names = "ref", "pclk", "phy_cfg"; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + mipi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_mipi>; + }; + mipi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_mipi>; + }; + }; + }; + }; + pinctrl: pinctrl { u-boot,dm-pre-reloc; compatible = "rockchip,rk3399-pinctrl"; |