diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2020-04-28 15:30:17 +0530 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2020-05-01 18:32:56 +0800 |
| commit | 167efc2c7a46fdac69be545ae5dbfb66edb4fd01 (patch) | |
| tree | 8e2c1c42247e144c8d29edb73777e4b169b695f8 /arch/arm/dts/rk3399-rock960.dtsi | |
| parent | 96993d7c358e9d87871a3c92fb3af081b2e3ff48 (diff) | |
| download | u-boot-167efc2c7a46fdac69be545ae5dbfb66edb4fd01.tar.gz | |
arm64: dts: rk3399: Sync v5.7-rc1 from Linux
Sync rk3399 dts(i) files from v5.7-rc1 linux-next.
Reason:
To get updated PCIe nodes and properties on respective
dts(i) files.
Summary:
- sync won't include new board dts(i)
- sync will add required files used on respective dts(i)
- rk3399-puma-u-boot.dtsi spiflash label changed to norflash
- move puma.dtsi bios_enable into rk3399-puma-u-boot.dtsi
- move legacy max-frequency of sdhci into rk3399-u-boot.dtsi
- update cross-ec-[keyboard|sbs].dtsi path as per U-Boot
- keep roc-rk3399-pc dc_12v changes to -u-boot.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/dts/rk3399-rock960.dtsi')
| -rw-r--r-- | arch/arm/dts/rk3399-rock960.dtsi | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi index c7d48d41e1..ba7c75c9f2 100644 --- a/arch/arm/dts/rk3399-rock960.dtsi +++ b/arch/arm/dts/rk3399-rock960.dtsi @@ -76,6 +76,15 @@ regulator-always-on; vin-supply = <&vcc5v0_sys>; }; + + vcc_0v9: vcc-0v9 { + compatible = "regulator-fixed"; + regulator-name = "vcc_0v9"; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; }; &cpu_l0 { @@ -384,6 +393,8 @@ num-lanes = <4>; pinctrl-names = "default"; pinctrl-0 = <&pcie_clkreqn_cpm>; + vpcie0v9-supply = <&vcc_0v9>; + vpcie1v8-supply = <&vcca_1v8>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; }; @@ -531,7 +542,7 @@ cap-mmc-highspeed; cap-sd-highspeed; clock-frequency = <100000000>; - clock-freq-min-max = <100000 100000000>; + max-frequency = <100000000>; cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; disable-wp; sd-uhs-sdr104; |