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authorChris Brandt <chris.brandt@renesas.com>2017-08-23 14:53:59 -0500
committerMarek Vasut <marex@denx.de>2019-05-07 05:41:32 +0200
commitba932bc846e8f44b7b61fcaac41e0be907d1303e (patch)
treebc90d4a9923d4785063dfe2821db76b884158503 /arch/arm/dts/r7s72100-gr-peach-u-boot.dts
parent3529596442c9cf588b7b8a3e7573f0ff9d8ed350 (diff)
downloadu-boot-ba932bc846e8f44b7b61fcaac41e0be907d1303e.tar.gz
ARM: dts: renesas: Add RZ/A1 GR-Peach board
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/arm/dts/r7s72100-gr-peach-u-boot.dts')
-rw-r--r--arch/arm/dts/r7s72100-gr-peach-u-boot.dts78
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
new file mode 100644
index 0000000000..28247d19d7
--- /dev/null
+++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the GR Peach board
+ *
+ * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#include "r7s72100-gr-peach.dts"
+
+/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+
+ leds {
+ led1 {
+ label = "peach:bottom:red";
+ };
+
+ led-red {
+ label = "peach:tri:red";
+ gpios = <&port6 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-green {
+ label = "peach:tri:green";
+ gpios = <&port6 14 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-blue {
+ label = "peach:tri:blue";
+ gpios = <&port6 15 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ rpc: rpc@0xee200000 {
+ compatible = "renesas,rpc-r7s72100", "renesas,rpc";
+ reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
+ bank-width = <2>;
+ num-cs = <1>;
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ reg = <0>;
+ status = "okay";
+ };
+ };
+};
+
+&ostm0 {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&scif2 {
+ u-boot,dm-pre-reloc;
+ clock = <66666666>; /* ToDo: Replace by DM clock driver */
+};
+
+&scif2_pins {
+ u-boot,dm-pre-reloc;
+};